On 11/02/2025 16:17, Matthew Gerlach wrote:
> The bus from HPS to the FPGA is part of the SoC. Move its
> device tree node to socfpga_agilex.dtsi to allow it to be
> referenced by any board.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
> ---
> v6:
> - New patch to series.
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 10 +++++++
> .../boot/dts/intel/socfpga_agilex_n6000.dts | 28 +++++++------------
> 2 files changed, 20 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> index 42cb24cfa6da..26ccdf042281 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> @@ -678,5 +678,15 @@ qspi: spi@ff8d2000 {
>
> status = "disabled";
> };
> +
> + bus80000000: bus@80000000 {
> + compatible = "simple-bus";
> + reg = <0x80000000 0x60000000>,
> + <0xf9000000 0x00100000>;
> + reg-names = "axi_h2f", "axi_h2f_lw";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <0x00000000 0x00000000 0x00000000 0x00000000>;
> + };
> };
> };
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
> index d22de06e9839..350c040ce9fe 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
> @@ -25,24 +25,6 @@ memory@80000000 {
> /* We expect the bootloader to fill in the reg */
> reg = <0 0x80000000 0 0>;
> };
> -
> - soc@0 {
> - bus@80000000 {
> - compatible = "simple-bus";
> - reg = <0x80000000 0x60000000>,
> - <0xf9000000 0x00100000>;
> - reg-names = "axi_h2f", "axi_h2f_lw";
> - #address-cells = <2>;
> - #size-cells = <1>;
> - ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
> -
> - dma-controller@0 {
> - compatible = "intel,hps-copy-engine";
> - reg = <0x00000000 0x00000000 0x00001000>;
> - #dma-cells = <1>;
> - };
> - };
> - };
> };
>
> &osc1 {
> @@ -64,3 +46,13 @@ &watchdog0 {
> &fpga_mgr {
> status = "disabled";
> };
> +
> +&bus80000000 {
Keep some sort of sorting.
> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
ranges is property of the SoC in such case.
> +
> + dma-controller@0 {
> + compatible = "intel,hps-copy-engine";
> + reg = <0x00000000 0x00000000 0x00001000>;
> + #dma-cells = <1>;
> + };
> +};
Best regards,
Krzysztof
