PCIe equalization presets are predefined settings used to optimize signal integrity by compensating for signal loss and distortion in high-speed data transmission. As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to configure lane equalization presets for each lane to enhance the PCIe link reliability. Each preset value represents a different combination of pre-shoot and de-emphasis values. For each data rate, different registers are defined: for 8.0 GT/s, registers are defined in section 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has an extra receiver preset hint, requiring 16 bits per lane, while the remaining data rates use 8 bits per lane. Based on the number of lanes and the supported data rate, read the device tree property and stores in the presets structure. Based upon the lane width and supported data rate update lane equalization registers. This patch depends on the this dt binding pull request which got recently merged: https://github.com/devicetree-org/dt-schema/pull/146 Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx> --- Changes in v6: - update the dt properties to match the lane width ( mani & konard) - move everything to helper function and let the helper function determine reg size and offset (mani) - update the function header (mani) - move the num_lanes check to the main function (mani) - Link to v5: https://lore.kernel.org/linux-kernel/20250128-preset_v2-v5-0-4d230d956f8c@xxxxxxxxxxxxxxxx/ Changes in v5: - Instead of using of_property_present use return value of of_property_read_u8_array to know about property is present or not and add a macro for reserved value(Konrad). - Link to v4: https://lore.kernel.org/r/20250124-preset_v2-v4-0-0b512cad08e1@xxxxxxxxxxxxxxxx Changes in v4: - use static arrays for storing preset values and use default value 0xff to indicate the property is not present (Dimitry & konrad). - Link to v3: https://lore.kernel.org/r/20241223-preset_v2-v3-0-a339f475caf5@xxxxxxxxxxxxxxxx Changes in v3: - In previous series a wrong patch was attached, correct it - Link to v2: https://lore.kernel.org/r/20241212-preset_v2-v2-0-210430fbcd8a@xxxxxxxxxxxxxxxx Changes in v2: - Fix the kernel test robot error - As suggested by konrad use for loop and read "eq-presets-%ugts", (8 << i) - Link to v1: https://lore.kernel.org/r/20241116-presets-v1-0-878a837a4fee@xxxxxxxxxxx --- Krishna Chaitanya Chundru (4): arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties PCI: of: Add API to retrieve equalization presets from device tree PCI: dwc: Improve handling of PCIe lane configuration PCI: dwc: Add support for configuring lane equalization presets arch/arm64/boot/dts/qcom/x1e80100.dtsi | 13 ++++++ drivers/pci/controller/dwc/pcie-designware-host.c | 56 +++++++++++++++++++++++ drivers/pci/controller/dwc/pcie-designware.c | 11 ++++- drivers/pci/controller/dwc/pcie-designware.h | 4 ++ drivers/pci/of.c | 43 +++++++++++++++++ drivers/pci/pci.h | 27 ++++++++++- include/uapi/linux/pci_regs.h | 3 ++ 7 files changed, 155 insertions(+), 2 deletions(-) --- base-commit: 3175967ecb3266d0ad7d2ca7ccceaf15fa2f15e2 change-id: 20250210-preset_v6-1e7f560d13ad Best regards, -- Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
