Configure PBus base address and address mask to allow the hw to detect
if a given address is on PCIE0, PCIE1 or PCIE2.
Introduce mediatek,pbus-csr phandle property.
Changes in v2:
- Introduce mediatek,pbus-csr phandle property
- Drop patch 1/2 in v1
- Do not hard-code compatible sting in the driver and use phandle
instead
---
Lorenzo Bianconi (2):
dt-bindings: PCI: mediatek-gen3: Add mediatek,pbus-csr phandle property
PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581 SoC
.../bindings/pci/mediatek-pcie-gen3.yaml | 12 +++++++++
drivers/pci/controller/pcie-mediatek-gen3.c | 30 +++++++++++++++++++++-
2 files changed, 41 insertions(+), 1 deletion(-)
---
base-commit: 647d69605c70368d54fc012fce8a43e8e5955b04
change-id: 20250201-en7581-pcie-pbus-csr-f9c4f88ce5b3
Best regards,
--
Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
