On 1/28/2025 4:56 PM, Konrad Dybcio wrote: > On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote: >> Interconnect cells differ between the IPQ5332 and IPQ5424. >> Therefore, update the interconnect cells according to the SoC. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx> >> --- >> .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> index 1230183fc0a9..fac7922d2473 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >> @@ -35,8 +35,6 @@ properties: >> - description: PCIE 2-lane PHY3 pipe clock source >> >> '#power-domain-cells': false >> - '#interconnect-cells': >> - const: 1 >> >> required: >> - compatible >> @@ -54,6 +52,9 @@ allOf: >> clocks: >> maxItems: 5 >> >> + '#interconnect-cells': >> + const: 1 >> + >> - if: >> properties: >> compatible: >> @@ -65,6 +66,9 @@ allOf: >> minItems: 7 >> maxItems: 7 >> >> + '#interconnect-cells': >> + const: 2 > > Please apply some criticism to the review comments you receive.. this only > makes sense for platforms using icc-rpm or icc-rpmh. > > Since this driver registers an interconnect provider through icc_clk APIs, > it explicitly uses a simple, onecell translation function to .get the nodes > > Please drop this patch Hi Konrad, Thank you for pointing this. I will drop the patch. Thanks & Regards, Manikanta.
