On Wed, Jan 29, 2025 at 02:52:33PM +0100, Jan Beulich wrote: > On 29.01.2025 14:32, Bjorn Helgaas wrote: > > On Wed, Jan 29, 2025 at 04:47:28AM +0100, Marek Marczykowski-Górecki wrote: > >> On Tue, Jan 28, 2025 at 09:40:18PM -0600, Bjorn Helgaas wrote: > >>> I guess the code at [2] is running in user mode and uses Linux > >>> syscalls for config access? Is it straceable? > >> > >> Nope, it's running as the hypervisor and mediates Linux's access to the > >> hardware. In fact, Linux PV kernel (which dom0 is by default under Xen) > >> is running in ring 3... > >> > >> But I can add some more logging there. > > > > So I guess the hypervisor performs the config access on behalf of the > > Linux PV kernel? Obviously Linux thinks CRS/RRS SV is enabled, but I > > suppose all the lspci output is similarly based on whatever the > > hypervisor does, so how do we know the actual hardware config? > > The hypervisor only intercepts config space writes; reads, particularly > when going via mmcfg, ought to be unaffected, and hence what lspci shows > should be "the actual hardware config". FWIW, on x86, the first 256 bytes of config space for domain 0 uses raw_pci_ops even when mmcfg is available (see raw_pci_read()). This normally means IO ports 0xcf8/0xcfc.
