Introduce `parent_bus_offset` in `resource_entry` and a new API,
`pci_add_resource_parent_bus_offset()`, to provide necessary information
for PCI controllers with address translation units.
Typical PCI data flow involves:
CPU (CPU address) -> Bus Fabric (Intermediate address) ->
PCI Controller (PCI bus address) -> PCI Bus.
While most bus fabrics preserve address consistency, some modify addresses
to intermediate values. The `parent_bus_offset` enables PCI controllers to
translate these intermediate addresses correctly to PCI bus addresses.
Pave the road to remove hardcoded cpu_addr_fixup() and similar patterns in
PCI controller drivers.
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
change from v9 to v10
- new patch
---
drivers/pci/bus.c | 11 +++++++++--
drivers/pci/of.c | 12 +++++++++++-
include/linux/pci.h | 2 ++
include/linux/resource_ext.h | 1 +
4 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 98910bc0fcc4e..52e88c391e256 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -31,8 +31,8 @@ struct pci_bus_resource {
struct resource *res;
};
-void pci_add_resource_offset(struct list_head *resources, struct resource *res,
- resource_size_t offset)
+void pci_add_resource_parent_bus_offset(struct list_head *resources, struct resource *res,
+ resource_size_t offset, resource_size_t parent_bus_offset)
{
struct resource_entry *entry;
@@ -43,8 +43,15 @@ void pci_add_resource_offset(struct list_head *resources, struct resource *res,
}
entry->offset = offset;
+ entry->parent_bus_offset = parent_bus_offset;
resource_list_add_tail(entry, resources);
}
+
+void pci_add_resource_offset(struct list_head *resources, struct resource *res,
+ resource_size_t offset)
+{
+ pci_add_resource_parent_bus_offset(resources, res, offset, 0);
+}
EXPORT_SYMBOL(pci_add_resource_offset);
void pci_add_resource(struct list_head *resources, struct resource *res)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index 7a806f5c0d201..aa4a2e266c55e 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -402,7 +402,17 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
res->flags &= ~IORESOURCE_MEM_64;
}
- pci_add_resource_offset(resources, res, res->start - range.pci_addr);
+ /*
+ * IORESOURCE_IO res->start is io space start address.
+ * IORESOURCE_MEM res->start is cpu start address, which is the
+ * same as range.cpu_addr.
+ *
+ * Use (range.cpu_addr - range.parent_bus_addr) to align both
+ * IO and MEM's parent_bus_offset always offset to cpu address.
+ */
+
+ pci_add_resource_parent_bus_offset(resources, res, res->start - range.pci_addr,
+ range.cpu_addr - range.parent_bus_addr);
}
/* Check for dma-ranges property */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 47b31ad724fa5..0d7e67b47be47 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1510,6 +1510,8 @@ static inline void pci_release_config_region(struct pci_dev *pdev,
void pci_add_resource(struct list_head *resources, struct resource *res);
void pci_add_resource_offset(struct list_head *resources, struct resource *res,
resource_size_t offset);
+void pci_add_resource_parent_bus_offset(struct list_head *resources, struct resource *res,
+ resource_size_t offset, resource_size_t parent_bus_offset);
void pci_free_resource_list(struct list_head *resources);
void pci_bus_add_resource(struct pci_bus *bus, struct resource *res);
struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
diff --git a/include/linux/resource_ext.h b/include/linux/resource_ext.h
index ff0339df56afc..b6ec6cc318203 100644
--- a/include/linux/resource_ext.h
+++ b/include/linux/resource_ext.h
@@ -24,6 +24,7 @@ struct resource_entry {
struct list_head node;
struct resource *res; /* In master (CPU) address space */
resource_size_t offset; /* Translation offset for bridge */
+ resource_size_t parent_bus_offset; /* Parent bus address offset for bridge */
struct resource __res; /* Default storage for res */
};
--
2.34.1
