Add pcie_ep node to support STM32 MP25 PCIe driver based on the
DesignWare PCIe core configured as Endpoint mode
Signed-off-by: Christian Bruel <christian.bruel@xxxxxxxxxxx>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 6cd1a765fac9..07c2d2c386f4 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -909,6 +909,19 @@ stmmac_axi_config_1: stmmac-axi-config {
};
};
+ pcie_ep: pcie-ep@48400000 {
+ compatible = "st,stm32mp25-pcie-ep";
+ reg = <0x48400000 0x400000>,
+ <0x10000000 0x8000000>;
+ reg-names = "dbi", "addr_space";
+ clocks = <&rcc CK_BUS_PCIE>;
+ resets = <&rcc PCIE_R>;
+ phys = <&combophy PHY_TYPE_PCIE>;
+ access-controllers = <&rifsc 68>;
+ power-domains = <&CLUSTER_PD>;
+ status = "disabled";
+ };
+
pcie_rc: pcie@48400000 {
compatible = "st,stm32mp25-pcie-rc";
device_type = "pci";
@@ -931,6 +944,7 @@ pcie_rc: pcie@48400000 {
resets = <&rcc PCIE_R>;
msi-parent = <&v2m0>;
access-controllers = <&rifsc 68>;
+ power-domains = <&CLUSTER_PD>;
status = "disabled";
pcie@0,0 {
@@ -942,6 +956,8 @@ pcie@0,0 {
ranges;
};
};
+
+
};
bsec: efuse@44000000 {
--
2.34.1
