On Wed, 18 Dec 2024 16:37:45 +0200 Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> wrote: > eetlp_prefix_path in the struct pci_dev tells if End-End TLP Prefixes > are supported by the path or not, the value is only calculated if > CONFIG_PCI_PASID is set. > > The Max End-End TLP Prefixes field in the Device Capabilities Register > 2 also tells how many (1-4) End-End TLP Prefixes are supported (PCIe > r6.2 sec 7.5.3.15). The number of supported End-End Prefixes is useful > for reading correct number of DWORDs from TLP Prefix Log register in AER > capability (PCIe r6.2 sec 7.8.4.12). > > Replace eetlp_prefix_path with eetlp_prefix_max and determine the > number of supported End-End Prefixes regardless of CONFIG_PCI_PASID so > that an upcoming commit generalizing TLP Prefix Log register reading > does not have to read extra DWORDs for End-End Prefixes that never will > be there. > > The value stored into eetlp_prefix_max is directly derived from > device's Max End-End TLP Prefixes and does not consider limitations > imposed by bridges or the Root Port beyond supported/not supported > flags. This is intentional for two reasons: > > 1) PCIe r6.2 spec sections r6.1 2.2.10.4 & 6.2.4.4 indicate that TLP > is handled malformed only if the number of prefixes exceed the number > of Max End-End TLP Prefixes, which seems to be the case even if the > device could never receive that many prefixes due to smaller maximum > imposed by a bridge or the Root Port. If TLP parsing is later added, > this distinction is significant in interpreting what is logged by the > TLP Prefix Log registers and the value matching to the Malformed TLP > threshold is going to be more useful. > > 2) TLP Prefix handling happens autonomously on a low layer and the > value in eetlp_prefix_max is not programmed anywhere by the kernel > (i.e., there is no limiter OS can control to prevent sending more > than n TLP Prefixes). > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> Extra explanation looks good to me. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
