The current implementation requires iATU for every configuration space access which increases latency & cpu utilization. Designware databook 5.20a, section 3.10.10.3 says about CFG Shift Feature, which shifts/maps the BDF (bits [31:16] of the third header DWORD, which would be matched against the Base and Limit addresses) of the incoming CfgRd0/CfgWr0 down to bits[27:12]of the translated address. Configuring iATU in config shift mode enables ECAM feature to access the config space, which avoids iATU configuration for every config access. Add cfg_shft_mode into struct dw_pcie_ob_atu_cfg to enable config shift mode. As DBI comes under config space, this avoids remapping of DBI space separately. Instead, it uses the mapped config space address returned from ECAM initialization. Change the order of dw_pcie_get_resources() execution to acheive this. Enable the ECAM feature if the config space size is equal to size required to represent number of buses in the bus range property. The ELBI registers falls after the DBI space, PARF_SLV_DBI_ELBI register gives us the offset from which ELBI starts. so use this offset and cfg win to map these regions instead of doing the ioremap again. On root bus, we have only the root port. Any access other than that should not go out of the link and should return all F's. Since the iATU is configured for the buses which starts after root bus, block the transactions starting from function 1 of the root bus to the end of the root bus (i.e from dbi_base + 4kb to dbi_base + 1MB) from going outside the link through ECAM blocker through PARF registers. Increase the configuration size to 256MB as required by the ECAM feature and also move config space, DBI, iATU to upper space and use lower space entirely for BAR region. Signed-off-by: Krishna chaitanya chundru <quic_krichai@xxxxxxxxxxx> --- changes in v2: - rename enable_ecam to ecam_mode as suggested by mani. - refactor changes as suggested by bjorn - remove ecam_init() function op as we have removed ELBI virtual address update from the ecam_init and moved to host init as we need the clocks to be enabled to read the ELBI offset from the PARF registers. - Update comments and commit message as suggested by bjorn. - Allocate host bridge in the DWC glue drivers as suggested by bjorn - move qcom_pcie_ecam_supported to dwc as suggested by mani. Link to v1: https://lore.kernel.org/r/linux-devicetree/20241117-ecam-v1-1-6059faf38d07@xxxxxxxxxxx/T/ --- Krishna Chaitanya Chundru (1): PCI: dwc: Reduce DT reads by allocating host bridge via DWC glue driver Krishna chaitanya chundru (3): arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature PCI: dwc: Add ECAM support with iATU configuration PCI: qcom: Enable ECAM feature arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 +- drivers/pci/controller/dwc/Kconfig | 1 + drivers/pci/controller/dwc/pcie-designware-host.c | 145 ++++++++++++++++++---- drivers/pci/controller/dwc/pcie-designware.c | 2 +- drivers/pci/controller/dwc/pcie-designware.h | 11 ++ drivers/pci/controller/dwc/pcie-qcom.c | 81 +++++++++++- 6 files changed, 218 insertions(+), 34 deletions(-) --- base-commit: e989da8ac2a4999cf6edfaf55880909577d438cd change-id: 20241211-enable_ecam-f9f94b7269b9 Best regards, -- Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
