Re: PCI IO ECS access is no longer possible for AMD family 17h

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+ Yazen.

On Mon, Dec 16, 2024 at 02:15:26PM +0100, Rostyslav Khudolii wrote:
> Hi all,
> 
> I am currently working on a custom AMD Ryzen™ Embedded R2000 (AMD
> Family 17h) device and have discovered that PCI IO Extended
> Configuration Space (ECS) access is no longer possible.

Perhaps that particular type of system of yours needs some special handling.

Things to try:

* use the latest upstream kernel

* add some debug printks to the paths you mention to see where they fail

Looking at the relevant chapter in the PPR - 2.1.7 or 2.1.8 - that
should still work.

Leaving in the rest for reference.

> Consider the following functions: amd_bus_cpu_online() and
> pci_enable_pci_io_ecs(). These functions are part of the
> amd_postcore_init() initcall and are responsible for enabling PCI IO
> ECS. Both functions modify the CoreMasterAccessCtrl (EnableCf8ExtCfg)
> value via the PCI device function or the MSR register directly (see
> the "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 15h",
> Section 2.7). However, neither the MSR register nor the PCI function
> at the specified address (D18F3x8C) exists for AMD Family 17h. The
> CoreMasterAccessCtrl register still exists but is now located at a
> different address (see the "Processor Programming Reference (PPR) for
> AMD Family 17h", Section 2.1.8).
> 
> I would be happy to submit a patch to fix this issue. However, since
> the most recent change affecting this functionality appears to be 14
> years old, I would like to confirm whether this is still relevant or
> if the kernel should always be built with CONFIG_PCI_MMCONFIG when ECS
> access is required.
> 
> Linux Kernel info:
> 
> root@qt5222:~# uname -a
> Linux qt5222 6.6.49-2447-qtec-standard--gef032148967a #1 SMP Fri Nov
> 22 09:25:55 UTC 2024 x86_64 GNU/Linux
> 
> Best regards,
> Ros

-- 
Regards/Gruss,
    Boris.

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