On 09.12.24 12:34, Paul Menzel wrote:
[Cc: +PCI folks]
Dear Gerhard,
Thank you for your patch.
Am 08.12.24 um 19:49 schrieb Gerhard Engleder:
From: Gerhard Engleder <eg@xxxxxxxx>
From: Gerhard Engleder <eg@xxxxxxxx>
The from line is present twice. No idea, if git is going to remove both.
It seems git send-email is adding this line again automatically.
Will be fixed next time.
Link down and up triggers update of MTA table. This update executes many
PCIe writes and a final flush. Thus, PCIe will be blocked until all
writes
are flushed. As a result, DMA transfers of other targets suffer from
delay
in the range of 50us. This results in timing violations on real-time
systems during link down and up of e1000e.
A flush after a low enough number of PCIe writes eliminates the delay
but also increases the time needed for MTA table update. The following
measurements were done on i3-2310E with e1000e for 128 MTA table entries:
Single flush after all writes: 106us
Flush after every write: 429us
Flush after every 2nd write: 266us
Flush after every 4th write: 180us
Flush after every 8th write: 141us
Flush after every 16th write: 121us
A flush after every 8th write delays the link up by 35us and the
negative impact to DMA transfers of other targets is still tolerable.
Execute a flush after every 8th write. This prevents overloading the
interconnect with posted writes.
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@xxxxxxxxx>
CC: Vitaly Lifshits <vitaly.lifshits@xxxxxxxxx>
Link:
https://lore.kernel.org/netdev/f8fe665a-5e6c-4f95-b47a-2f3281aa0e6c@xxxxxxx/T/
Signed-off-by: Gerhard Engleder <eg@xxxxxxxx>
---
v2:
- remove PREEMPT_RT dependency (Andrew Lunn, Przemek Kitszel)
---
drivers/net/ethernet/intel/e1000e/mac.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c
b/drivers/net/ethernet/intel/e1000e/mac.c
index d7df2a0ed629..7d1482a9effd 100644
--- a/drivers/net/ethernet/intel/e1000e/mac.c
+++ b/drivers/net/ethernet/intel/e1000e/mac.c
@@ -331,8 +331,13 @@ void e1000e_update_mc_addr_list_generic(struct
e1000_hw *hw,
}
/* replace the entire MTA table */
- for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
+ for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) {
E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);
+
+ /* do not queue up too many writes */
Maybe make the comment more elaborate?
I will try to extend based on comments from the other thread.
+ if ((i % 8) == 0 && i != 0)
+ e1e_flush();
+ }
e1e_flush();
}
Kind regards,
Paul
Thank you for the review!
Gerhard
