On Thu, Dec 05, 2024 at 07:49:34PM -0600, Bjorn Helgaas wrote: > Oops, I think I got this part backwards. The patch uses PCI PM if > d3cold_allowed is set, and it's set by default, so it does what you > need for the Qualcomm platform *without* user intervention. > > But I guess using the flag allows users in other situations to force > use of NVMe power management by clearing d3cold_allowed via sysfs. > Does that mean some unspecified other platforms might only work > correctly with that user intervention? Still seems awkward to overload fields like this. The istory here is the the NVMe internal power states are significantly better for the SSDs. It avoid shutting down the SSD frequently, which creates a lot of extra erase cycles and reduces life time. It also prevents the SSD from performing maintainance operations while the host system is idle, which is the perfect time for them. But the idea of putting all periphals into D3 is gaining a lot of ground because it makes the platform vendors life a lot simpler at the cost of others.
