[+to Rob, DMA mask question]
On Tue, Nov 26, 2024 at 04:51:16PM +0100, Christian Bruel wrote:
> Add driver for the STM32MP25 SoC PCIe Gen2 controller based on the
> DesignWare PCIe core.
Can you include the numeric rate, not just "gen2", so we don't have to
search for it?
> +static int stm32_pcie_resume_noirq(struct device *dev)
> +{
> + struct stm32_pcie *stm32_pcie = dev_get_drvdata(dev);
> + struct dw_pcie *pci = stm32_pcie->pci;
> + struct dw_pcie_rp *pp = &pci->pp;
> + int ret;
> +
> + /* init_state must be called first to force clk_req# gpio when no
> + * device is plugged.
> + */
Use drivers/pci/ conventional comment style:
/*
* text ...
*/
> +static bool is_stm32_pcie_driver(struct device *dev)
> +{
> + /* PCI bridge */
> + dev = get_device(dev);
> +
> + /* Platform driver */
> + dev = get_device(dev->parent);
> +
> + return (dev->driver == &stm32_pcie_driver.driver);
> +}
> +
> +/*
> + * DMA masters can only access the first 4GB of memory space,
> + * so we setup the bus DMA limit accordingly.
> + */
> +static int stm32_dma_limit(struct pci_dev *pdev, void *data)
> +{
> + dev_dbg(&pdev->dev, "disabling DMA DAC for device");
> +
> + pdev->dev.bus_dma_limit = DMA_BIT_MASK(32);
I don't think this is the right way to do this. Surely there's a way
to describe the DMA capability of the bridge once instead of iterating
over all the downstream devices? This quirk can't work for hot-added
devices anyway.
> + return 0;
> +}
> +
> +static void quirk_stm32_dma_mask(struct pci_dev *pci)
> +{
> + struct pci_dev *root_port;
> +
> + root_port = pcie_find_root_port(pci);
> +
> + if (root_port && is_stm32_pcie_driver(root_port->dev.parent))
> + pci_walk_bus(pci->bus, stm32_dma_limit, NULL);
> +}
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0x0550, quirk_stm32_dma_mask);
