Hey Nitish, Due to some discussions about including this in the EDAC framework etc, the patches got delayed. Sorry about that. I am already working on the next version and will post it by this Friday! Feel free to add review comments to the previous version if there are any so that I can include them in my next version. > -----Original Message----- > From: Nitesh Gupta <quic_nitegupt@xxxxxxxxxxx> > Sent: 26 November 2024 12:46 > To: Krishna Chaitanya Chundru <quic_krichai@xxxxxxxxxxx>; Shradha Todi > <shradha.t@xxxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx; linux- > pci@xxxxxxxxxxxxxxx > Cc: manivannan.sadhasivam@xxxxxxxxxx; lpieralisi@xxxxxxxxxx; > kw@xxxxxxxxx; robh@xxxxxxxxxx; bhelgaas@xxxxxxxxxx; > jingoohan1@xxxxxxxxx; fancer.lancer@xxxxxxxxx; > yoshihiro.shimoda.uh@xxxxxxxxxxx; conor.dooley@xxxxxxxxxxxxx; > pankaj.dubey@xxxxxxxxxxx; gost.dev@xxxxxxxxxxx > Subject: Re: [PATCH v3 0/3] Add support for RAS DES feature in PCIe DW > > Hi Shradha, > > Can you please update on status of this Patch? > > Are you going to take it up or is it fine for us to take it up? > > -Nitesh Gupta > > On 11/26/2024 10:47 AM, Krishna Chaitanya Chundru wrote: > > > > forgot to add the email in the previous mail. > > > > - Krishna chaitanya. > > On 6/25/2024 3:08 PM, Shradha Todi wrote: > >> DesignWare controller provides a vendor specific extended capability > >> called RASDES as an IP feature. This extended capability provides > >> hardware information like: > >> - Debug registers to know the state of the link or controller. > >> - Error injection mechanisms to inject various PCIe errors > >> including > >> sequence number, CRC > >> - Statistical counters to know how many times a particular event > >> occurred > >> > >> However, in Linux we do not have any generic or custom support to be > >> able to use this feature in an efficient manner. This is the reason > >> we are proposing this framework. Debug and bring up time of > >> high-speed IPs are highly dependent on costlier hardware analyzers > >> and this solution will in some ways help to reduce the HW analyzer usage. > >> > >> The debugfs entries can be used to get information about underlying > >> hardware and can be shared with user space. Separate debugfs entries > >> has been created to cater to all the DES hooks provided by the controller. > >> The debugfs entries interacts with the RASDES registers in the > >> required sequence and provides the meaningful data to the user. This > >> eases the effort to understand and use the register information for > debugging. > >> > >> v2: https://lore.kernel.org/lkml/20240319163315.GD3297@thinkpad/T/ > >> > >> v1: > >> https://lore.kernel.org/all/20210518174618.42089-1-shradha.t@samsung. > >> com/T/ > >> > >> Shradha Todi (3): > >> PCI: dwc: Add support for vendor specific capability search > >> PCI: debugfs: Add support for RASDES framework in DWC > >> PCI: dwc: Create debugfs files in DWC driver > >> > >> drivers/pci/controller/dwc/Kconfig | 8 + > >> drivers/pci/controller/dwc/Makefile | 1 + > >> .../controller/dwc/pcie-designware-debugfs.c | 474 > >> ++++++++++++++++++ > >> .../controller/dwc/pcie-designware-debugfs.h | 0 > >> .../pci/controller/dwc/pcie-designware-host.c | 2 + > >> drivers/pci/controller/dwc/pcie-designware.c | 20 + > >> drivers/pci/controller/dwc/pcie-designware.h | 18 + > >> 7 files changed, 523 insertions(+) > >> create mode 100644 > >> drivers/pci/controller/dwc/pcie-designware-debugfs.c > >> create mode 100644 > >> drivers/pci/controller/dwc/pcie-designware-debugfs.h > >>
