Re: [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL upstream and downstream switch ports

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On Wed, Nov 13, 2024 at 03:54:29PM -0600, Terry Bowman wrote:
> Export the AER service driver's pci_aer_unmask_internal_errors() function
> to CXL namsespace.
         ^^^^^^^^^^
	 namespace

> Remove the function's dependency on the CONFIG_PCIEAER_CXL kernel config
> because it is now an exported function.
[...]
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -949,7 +949,6 @@ static bool is_internal_error(struct aer_err_info *info)
>  	return info->status & PCI_ERR_UNC_INTN;
>  }
>  
> -#ifdef CONFIG_PCIEAER_CXL
>  /**
>   * pci_aer_unmask_internal_errors - unmask internal errors
>   * @dev: pointer to the pcie_dev data structure
> @@ -960,7 +959,7 @@ static bool is_internal_error(struct aer_err_info *info)
>   * Note: AER must be enabled and supported by the device which must be
>   * checked in advance, e.g. with pcie_aer_is_native().
>   */
> -static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> +void pci_aer_unmask_internal_errors(struct pci_dev *dev)

Hm, it seems the reason why you're moving pci_aer_unmask_internal_errors()
outside of "ifdef CONFIG_PCIEAER_CXL" is that drivers/cxl/core/pci.c
is conditional on CONFIG_CXL_BUS, whereas CONFIG_PCIEAER_CXL depends
on CONFIG_CXL_PCI.

In other words, you need this to avoid build breakage if CONFIG_CXL_BUS
is enabled but CONFIG_CXL_PCI is not.

I'm wondering (as a CXL ignoramus) why that can happen in the first
place, i.e. why is drivers/cxl/core/pci.c compiled at all if
CONFIG_CXL_PCI is disabled?

Thanks,

Lukas




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