Re: [PATCH] PCI: Quirk for ASUS S3 issue

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On Thu, 5 Jul 2012, Bjorn Helgaas wrote:

> >> Windows sets the COMMAND register to 0 before suspending, so it doesn't
> >> trigger the BIOS bus.  Linux doesn't, so the BIOS tries to quiesce the
> >> EHCI controller.  This involves doing various MMIO accesses, which of
> >> course don't work if the controller is already in D3.
> 
> Should we clear the COMMAND register for more than just EHCI devices?
> It seems like known differences from Windows are just waiting to bite
> us.

You're undoubtedly right, but I don't know what Windows does!  I'm just 
relying on what AceLan reported.

For the patch, I wanted to change the system behavior as little as
possible -- hence the restriction to EHCI controllers.  For all I know
it might be perfectly okay to do this with all PCI devices, but it
seems more likely that it would cause trouble in some obscure cases.  

And at least with EHCI controllers, I know what the underlying driver
is doing.

> I like your patch and explanation for how this can cause a hang...
> that helps make sense of things.
> 
> >> For obvious reasons, I'm in favor of my two-line change over AceLan's
> >> new PCI quirk.  So far there have been positive responses from a few
> >> volunteers testing the patch.
> >
> > The two-liner is good enough, I think, and tested.  We can always add a quirk
> > based on it in the future.
> 
> Cool, do you want to send me a patch with Signed-off-by, etc?

I'll send it early next week.

Alan Stern

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