On Thu, Oct 31, 2024 at 12:27:03PM -0400, Frank Li wrote:
> Add three registers: PCIE_ENDPOINT_TEST_DB_BAR, PCIE_ENDPOINT_TEST_DB_ADDR,
> and PCIE_ENDPOINT_TEST_DB_DATA.
>
> Trigger the doorbell by writing data from PCI_ENDPOINT_TEST_DB_DATA to the
> address provided by PCI_ENDPOINT_TEST_DB_ADDR and wait for endpoint
> feedback.
>
> Add two command to COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL
> to enable EP side's doorbell support and avoid compatible problem.
>
> Host side new driver Host side old driver
> EP: new driver S F
> EP: old driver F F
>
> S: If EP side support MSI, 'pcitest -B' return success.
> If EP side doesn't support MSI, the same to 'F'.
>
> F: 'pcitest -B' return failure, other case as usual.
>
> Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
> ---
> change from v3 to v4
> - Add COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL.
> - Remove new DID requirement.
> ---
> drivers/misc/pci_endpoint_test.c | 63 ++++++++++++++++++++++++++++++++++++++++
> include/uapi/linux/pcitest.h | 1 +
> 2 files changed, 64 insertions(+)
>
> diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
> index 3aaaf47fa4ee2..d8193626c8965 100644
> --- a/drivers/misc/pci_endpoint_test.c
> +++ b/drivers/misc/pci_endpoint_test.c
> @@ -42,6 +42,8 @@
> #define COMMAND_READ BIT(3)
> #define COMMAND_WRITE BIT(4)
> #define COMMAND_COPY BIT(5)
> +#define COMMAND_ENABLE_DOORBELL BIT(6)
> +#define COMMAND_DISABLE_DOORBELL BIT(7)
>
> #define PCI_ENDPOINT_TEST_STATUS 0x8
> #define STATUS_READ_SUCCESS BIT(0)
> @@ -53,6 +55,11 @@
> #define STATUS_IRQ_RAISED BIT(6)
> #define STATUS_SRC_ADDR_INVALID BIT(7)
> #define STATUS_DST_ADDR_INVALID BIT(8)
> +#define STATUS_DOORBELL_SUCCESS BIT(9)
> +#define STATUS_DOORBELL_ENABLE_SUCCESS BIT(10)
> +#define STATUS_DOORBELL_ENABLE_FAIL BIT(11)
> +#define STATUS_DOORBELL_DISABLE_SUCCESS BIT(12)
> +#define STATUS_DOORBELL_DISABLE_FAIL BIT(13)
>
> #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
> #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
> @@ -67,7 +74,12 @@
> #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
>
> #define PCI_ENDPOINT_TEST_FLAGS 0x2c
> +#define PCI_ENDPOINT_TEST_DB_BAR 0x30
> +#define PCI_ENDPOINT_TEST_DB_ADDR 0x34
> +#define PCI_ENDPOINT_TEST_DB_DATA 0x38
> +
> #define FLAG_USE_DMA BIT(0)
> +#define FLAG_SUPPORT_DOORBELL BIT(1)
Unused.
>
> #define PCI_DEVICE_ID_TI_AM654 0xb00c
> #define PCI_DEVICE_ID_TI_J7200 0xb00f
> @@ -75,6 +87,7 @@
> #define PCI_DEVICE_ID_TI_J721S2 0xb013
> #define PCI_DEVICE_ID_LS1088A 0x80c0
> #define PCI_DEVICE_ID_IMX8 0x0808
> +#define PCI_DEVICE_ID_IMX8_DB 0x080c
Unused.
>
> #define is_am654_pci_dev(pdev) \
> ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
> @@ -108,6 +121,7 @@ enum pci_barno {
> BAR_3,
> BAR_4,
> BAR_5,
> + NO_BAR = -1,
> };
>
> struct pci_endpoint_test {
> @@ -746,6 +760,52 @@ static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
> return false;
> }
>
> +static bool pci_endpoint_test_doorbell(struct pci_endpoint_test *test)
> +{
> + enum pci_barno bar;
> + u32 data, status;
> + u32 addr;
You need to do:
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
Before sending the COMMAND_ENABLE_DOORBELL command.
Otherwise, when EP sends an IRQ in response to COMMAND_ENABLE_DOORBELL
being done, it will send it using type reg->irq_type, which will be 0,
since you haven't initialized it. Thus the EP will trigger a INTx IRQ.
You probably also want to have a variable:
int irq_type = test->irq_type;
So that you initialize irq_type to test->irq_type, instead of using the
global variable irq_type.
(This matches how it is done in pci_endpoint_test_write(),
pci_endpoint_test_read(), and pci_endpoint_test_write().)
> +
> + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
> + COMMAND_ENABLE_DOORBELL);
> +
> + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000));
> +
> + status = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
> + if (status & STATUS_DOORBELL_ENABLE_FAIL)
> + return false;
> +
> + data = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_DATA);
> + addr = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_ADDR);
> + bar = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_BAR);
> +
> + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
> + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
> +
> + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS, 0);
> +
> + bar = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_BAR);
> +
> + writel(data, test->bar[bar] + addr);
> +
> + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000));
> +
> + status = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
> +
> + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
> + COMMAND_DISABLE_DOORBELL);
> +
> + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000));
> +
> + status |= pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
> +
> + if ((status & STATUS_DOORBELL_SUCCESS) &&
> + (status & STATUS_DOORBELL_DISABLE_SUCCESS))
> + return true;
> +
> + return false;
> +}
> +
> static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
> unsigned long arg)
> {
> @@ -793,6 +853,9 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
> case PCITEST_CLEAR_IRQ:
> ret = pci_endpoint_test_clear_irq(test);
> break;
> + case PCITEST_DOORBELL:
> + ret = pci_endpoint_test_doorbell(test);
> + break;
> }
>
> ret:
> diff --git a/include/uapi/linux/pcitest.h b/include/uapi/linux/pcitest.h
> index 94b46b043b536..06d9f548b510e 100644
> --- a/include/uapi/linux/pcitest.h
> +++ b/include/uapi/linux/pcitest.h
> @@ -21,6 +21,7 @@
> #define PCITEST_SET_IRQTYPE _IOW('P', 0x8, int)
> #define PCITEST_GET_IRQTYPE _IO('P', 0x9)
> #define PCITEST_CLEAR_IRQ _IO('P', 0x10)
> +#define PCITEST_DOORBELL _IO('P', 0x11)
>
> #define PCITEST_FLAGS_USE_DMA 0x00000001
>
>
> --
> 2.34.1
>
