> On Tue, Nov 05, 2024 at 07:13:52PM +0100, Lorenzo Bianconi wrote: > > > On Mon, Nov 04, 2024 at 11:00:05PM +0100, Lorenzo Bianconi wrote: > > > > Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal > > > > causing occasional PCIe link down issues. In order to overcome the > > > > problem, PCIE_RSTB signals are not asserted/released during device probe or > > > > suspend/resume phase and the PCIe block is reset using REG_PCI_CONTROL > > > > (0x88) and REG_RESET_CONTROL (0x834) registers available via the clock > > > > module. > > > > Introduce flags field in the mtk_gen3_pcie_pdata struct in order to > > > > specify per-SoC capabilities. > > > > > > Where does this alternate way of doing reset (using REG_PCI_CONTROL > > > and REG_RESET_CONTROL) happen? Why isn't there something in this > > > patch to use that alternate method at the same points where > > > PCIE_PE_RSTB is used? > > > > REG_RESET_CONTROL (0x834) is already asserted/released in the following flow: > > > > mtk_pcie_en7581_power_up() -> reset_control_bulk_deassert() -> en7523_reset_update() > > https://github.com/torvalds/linux/blob/master/drivers/clk/clk-en7523.c#L470 > > > > REG_PCI_CONTROL (0x88) is already asserted/released in the following flow: > > mtk_pcie_en7581_power_up() -> clk_bulk_enable() -> en7581_pci_enable() > > https://github.com/torvalds/linux/blob/master/drivers/clk/clk-en7523.c#L385 > > So IIUC, you're saying that on EN7581, the PCI hierarchy is reset by > the soc->power_up() callback, mtk_pcie_en7581_power_up(), via > REG_PCI_CONTROL and REG_RESET_CONTROL. yes, correct. > > I assume the hierarchy is also reset by the non-EN7581 .power_up() > callback, mtk_pcie_power_up()? as pointed out by Jianjun Wang, non-EN7581 family is reset via PCIE_RSTB signals and .power_up() callback is used just for initialization. For EN7581 family we need to reset the device via .power_up() callback since we have a hw issue with PCIE_PE_RSTB signal (at least this is my take-away :)) > > And prior to this patch, we reset the hierarchy *again* in > mtk_pcie_startup_port() via PCIE_RST_CTRL_REG, but this causes > occasional "link down" issues because of a EN7581 hardware defect. yes, correct > > So for EN7581, this patch skips the PCIE_RST_CTRL_REG reset in > mtk_pcie_startup_port(). yes, correct > > .power_up() and mtk_pcie_startup_port() are used both at probe time > and in mtk_pcie_resume_noirq(). So after this patch, I assume: > > - EN7581 resets the hierarchy once at probe and resume instead of > twice. yes, correct > > - Non-EN7581 resets the hierarchy twice at probe and resume. nope, just once since .power_up() does not reset the device. Regards, Lorenzo > > I assume I'm missing something (maybe mtk_pcie_power_up() doesn't > actually reset the hierarchy?) because I don't see why we would reset > the hierarchy twice for either controller. > > Bjorn
Attachment:
signature.asc
Description: PGP signature