On 11/4/2024 3:50 PM, Dan Williams wrote: > Jonathan Cameron wrote: >> On Fri, 25 Oct 2024 16:02:56 -0500 >> Terry Bowman <terry.bowman@xxxxxxx> wrote: > [..] >> Anyhow, I think it is fine but I would call out that this changes >> things so that the PCI error handlers are no longer called for CXL ports >> if it's an internal error. >> >> With a sentence on that: >> >> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx> >> >> I'm not 100% convinced the path of separate handlers is the way to go >> but we can always change things again if that doesn't work out. > Hmm, if that part is not clear there should at least be more > documentation as to the "why". For me it is the fact that CXL > potentially promotes endpoint errors to region scope recovery actions, > and that PCIe native AER has no concept of AER triggering unrecoverable > system fatal reponse. > > To date panic on AER error has only been logic that ACPI APEI can > deploy, and the kernel has no chance to evaluate the error. So, CXL > error handlers is a reflection that these errors are outside of the PCIe > AER error model. Hi Dan, I'll elaborate more and touch on what you mentioned. Regards, Terry
