On Mon, Feb 26, 2024 at 07:47:30PM +0100, Wadim Mueller wrote: [...] > Okay, I understand this. The hypervisor was more of an example. I will > try to explain. > > I am currently reading through the virtio spec [1]. > In chapter 4.1.4.5.1 there is the following statement: > > "The device MUST reset ISR status to 0 on driver read." > > So I was wondering, how we, as an PCI EP Device, supposed to clear a > register when the driver reads the same register? I mean how do we detect a > register read? > If you are a hypervisor its easy to do so, because you can intercept > every memory access made my the guest (the same applies if you build > custom HW for this purpose). But for us as an EP device its > difficult to detect this, even with MSIs and Doorbell Registers in > place. > Sorry for not responding earlier. Conversation got lost. Yes, I do agree that some of the expecatations of the current Virtio spec cannot be satisfied by the physical endpoint device. So I presented some of these problems at this year plumbers and the Virtio maintainer in the room agreed to have changes in the spec to fix these issues. But it is not clear atm on whether we should introduce the changes in the virtio-pci transport or introduce a new transport altogether. I can include you in the discussions if you are still interested. - Mani -- மணிவண்ணன் சதாசிவம்
