Re: [PATCH v7 08/10] PCI, x86: add MMCFG information on demand

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On Sat, Jun 16, 2012 at 2:08 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
> On Sat, Jun 16, 2012 at 2:23 AM, Jiang Liu <jiang.liu@xxxxxxxxxx> wrote:
>> On 2012-6-16 0:51, Yinghai Lu wrote:
>>>
>>> still have some problem:
>>> pci_mmcfg_check_reserved==>is_mmconf_reserved
>>>
>>> will update cfg->end_bus.
>> Hi Yinghai,
>>        How about following patch for this issue? I guess we need to
>> keep current behavior at boot time for backward compatibility, right?
>
> We'd better to make all path share as most code as possible.
> 1. hostbridge scanning during boot -- early, it will check chipset and e820
> 2. MCFG checking during boot -- early, it will check e820
> 3. MCFG checking during boot -- late, it will check acpi pnp
> 4. _CBA checking for hotplug-able pci root bus but it is installed during boot.
> 5. _CBA checking for hotplug-able pci root bus during run time.
>
> please keep mapping for all entries in MCFG table. aka 1, 2, 3.
> I have some local patches that will read ext pci conf space before scan pci bus.
> please check attached one for nehalem-ioh.

I don't think it's a requirement that Gerry keep your Nehalem patch
working.  Your intel_bus.c is not in the tree and you haven't provided
an explanation for why it should be.

The only requirement I'm aware of for PCI config access before we
discover the host bridges via ACPI is for segment group 0, bus 0, as
mentioned in ACPI spec 5.0, sec 5.2.3.1, PDF page 143, and I think
that applies only to the first 0x100 bytes of config space.  I don't
think there's a requirement for access to the extended configuration
space (bytes 0x100-0xFFF).  I do not see a requirement that this
pre-host bridge access happen via MMCONFIG; as far as I can tell, we
can use the legacy 0xCF8/0xCFC mechanism.

> for case 4, 5: only need to add one bool in acpi_pci_root to record if
> mmconf list and mapping is touched.
>
> Thanks
>
> Yinghai
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