On 30.08.2024 10:11 AM, Sricharan R wrote:
> From: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx>
>
> Add Qualcomm PCIe UNIPHY 28LP driver support present
> in Qualcomm IPQ5018 SoC and the phy init sequence.
>
> Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>
> ---
[...]
> +static const struct qcom_uniphy_pcie_data ipq5018_2x1_data = {
> + .lanes = 1,
> + .lane_offset = 0x800,
> + .phy_type = PHY_TYPE_PCIE_GEN2,
> + .init_seq = ipq5018_regs,
> + .init_seq_num = ARRAY_SIZE(ipq5018_regs),
> +};
> +
> +static const struct qcom_uniphy_pcie_data ipq5018_2x2_data = {
> + .lanes = 2,
> + .lane_offset = 0x800,
> + .phy_type = PHY_TYPE_PCIE_GEN2,
> + .init_seq = ipq5018_regs,
> + .init_seq_num = ARRAY_SIZE(ipq5018_regs),
> +};
As krzk suggested, the difference is just num-lanes
[...]
> +static int qcom_uniphy_pcie_power_off(struct phy *x)
> +{
> + struct qcom_uniphy_pcie *phy = phy_get_drvdata(x);
> +
> + reset_control_assert(phy->resets);
Is the reset line supposed to be kept asserted?
[...]
> +MODULE_LICENSE("Dual BSD/GPL");
Was that intended?
Konrad
