From: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx>
Enable the PCIe controller and PHY nodes for RDP 432-c2.
Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>
---
[V3] Added perst/wake pins
.../arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index 8460b538eb6a..602c3c2d6ca3 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -28,6 +28,19 @@ &blsp1_uart1 {
status = "okay";
};
+&pcie1 {
+ pinctrl-0 = <&pcie1_default>;
+ pinctrl-names = "default";
+
+ perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pcie_x2phy {
+ status = "okay";
+};
+
&sdhc_1 {
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
@@ -43,6 +56,30 @@ &sleep_clk {
};
&tlmm {
+ pcie1_default: pcie1-default-state {
+ clkreq-n-pins {
+ pins = "gpio17";
+ function = "pcie1_clk";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio15";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ output-low;
+ };
+
+ wake-n-pins {
+ pins = "gpio19";
+ function = "pcie1_wake";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+ };
+
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio9";
--
2.34.1
