On 27.08.2024 8:36 AM, Qiang Yu wrote:
> On platform x1e80100 QCP, PCIe3 is a standard x8 form factor. Hence, add
> support to use 3.3v, 3.3v aux and 12v regulators.
>
> Signed-off-by: Qiang Yu <quic_qianyu@xxxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 52 +++++++++++++++++++++++++-
> 1 file changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 6f953e32d990..59fb415dfeeb 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -248,6 +248,8 @@ struct qcom_pcie_cfg {
> bool no_l0s;
> };
>
> +#define QCOM_PCIE_SLOT_MAX_SUPPLIES 3
> +
> struct qcom_pcie {
> struct dw_pcie *pci;
> void __iomem *parf; /* DT parf */
> @@ -260,6 +262,7 @@ struct qcom_pcie {
> struct icc_path *icc_cpu;
> const struct qcom_pcie_cfg *cfg;
> struct dentry *debugfs;
> + struct regulator_bulk_data slot_supplies[QCOM_PCIE_SLOT_MAX_SUPPLIES];
> bool suspended;
> bool use_pm_opp;
> };
> @@ -1174,6 +1177,41 @@ static int qcom_pcie_link_up(struct dw_pcie *pci)
> return !!(val & PCI_EXP_LNKSTA_DLLLA);
> }
>
> +static int qcom_pcie_enable_slot_supplies(struct qcom_pcie *pcie)
> +{
> + struct dw_pcie *pci = pcie->pci;
> + int ret;
> +
> + ret = regulator_bulk_enable(ARRAY_SIZE(pcie->slot_supplies),
> + pcie->slot_supplies);
> + if (ret < 0)
> + dev_err(pci->dev, "Failed to enable slot regulators\n");
return dev_err_probe would be a good call.. probably more so below,
but won't hurt to use here too
> +
> + return ret;
> +}
> +
> +static void qcom_pcie_disable_slot_supplies(struct qcom_pcie *pcie)
> +{
> + regulator_bulk_disable(ARRAY_SIZE(pcie->slot_supplies),
> + pcie->slot_supplies);
> +}
This I feel like is overly abstracted
Konrad
