On Thu, 22 Aug 2024, Mario Limonciello wrote:
> From: Mario Limonciello <mario.limonciello@xxxxxxx>
>
> A device that has gone through a reset may return a value in PCI_COMMAND
> but that doesn't mean it's finished transitioning to D0. On devices that
> support power management explicitly check PCI_PM_CTRL on everything but
> system resume to ensure the transition happened.
>
> Devices that don't support power management and system resume will
> continue to use PCI_COMMAND.
It feels part of the coverletter text would belong into this patch.
> Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
> ---
> drivers/pci/pci.c | 28 ++++++++++++++++++++--------
> 1 file changed, 20 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index e4a7f5dfe6bf4..b7717155e2fd0 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1308,21 +1308,33 @@ static int pci_dev_wait(struct pci_dev *dev, enum pci_reset_type reset_type, int
> * the read (except when CRS SV is enabled and the read was for the
> * Vendor ID; in that case it synthesizes 0x0001 data).
> *
> - * Wait for the device to return a non-CRS completion. Read the
> - * Command register instead of Vendor ID so we don't have to
> - * contend with the CRS SV value.
> + * Wait for the device to return a non-CRS completion. On devices
> + * that support PM control and on waits that aren't part of system
> + * resume read the PM control register to ensure the device has
> + * transitioned to D0. On devices that don't support PM control,
> + * or during system resume read the command register to instead of
> + * Vendor ID so we don't have to contend with the CRS SV value.
> */
> for (;;) {
> - u32 id;
> -
> if (pci_dev_is_disconnected(dev)) {
> pci_dbg(dev, "disconnected; not waiting\n");
> return -ENOTTY;
> }
>
> - pci_read_config_dword(dev, PCI_COMMAND, &id);
> - if (!PCI_POSSIBLE_ERROR(id))
> - break;
> + if (dev->pm_cap && reset_type != PCI_DEV_WAIT_RESUME) {
> + u16 pmcsr;
> +
> + pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
> + if (!PCI_POSSIBLE_ERROR(pmcsr) &&
> + (pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D0)
Misleading indentation.
--
i.
> + break;
> + } else {
> + u32 id;
> +
> + pci_read_config_dword(dev, PCI_COMMAND, &id);
> + if (!PCI_POSSIBLE_ERROR(id))
> + break;
> + }
>
> if (delay > timeout) {
> pci_warn(dev, "not ready %dms after %s; giving up\n",
>
