On Tue, Aug 20, 2024 at 7:38 PM Stanimir Varbanov <svarbanov@xxxxxxx> wrote: > > Hi Florian, > > On 8/19/24 22:07, Florian Fainelli wrote: > > On 8/17/24 10:41, Stanimir Varbanov wrote: > >> Hi Jim, > >> > >> On 8/16/24 01:57, Jim Quinlan wrote: > >>> The 7712 SOC has a bridge reset which can be described in the device > >>> tree. > >>> Use it if present. Otherwise, continue to use the legacy method to > >>> reset > >>> the bridge. > >>> > >>> Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx> > >>> --- > >>> drivers/pci/controller/pcie-brcmstb.c | 24 +++++++++++++++++++----- > >>> 1 file changed, 19 insertions(+), 5 deletions(-) > >> > >> Reviewed-by: Stanimir Varbanov <svarbanov@xxxxxxx> > >> > >> One problem though on RPi5 (bcm2712). > >> > >> With this series applied + my WIP patches for enablement of PCIe on > >> bcm2712 when enable the pcie1 and pcie2 root ports in dts, I see kernel > >> boot stuck on pcie2 enumeration and I have to add this [1] to make it > >> work again. > >> > >> Some more info about resets used: > >> > >> pcie0 @ 100000: > >> resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>; > >> reset-names = "swinit", "bridge", "rescal"; > >> > >> pcie1 @ 110000: > >> resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>; > >> reset-names = "swinit", "bridge", "rescal"; > >> > >> pcie2 @ 120000: > >> resets = <&bcm_reset 9>, <&bcm_reset 44>, <&pcie_rescal>; > >> reset-names = "swinit", "bridge", "rescal"; > > >> > >> I changed "swinit" reset for pcie2 to <&bcm_reset 9> (it is 32 in > >> downstream rpi kernel) because otherwise I'm unable to enumerate RP1 > >> south bridge at all. > > > > The value 9 is unused, so I suppose it does not really hurt to use it, > > but it is also unlikely to achieve what you desire. 32 is the correct > > value since pcie2_sw_init is bit 0 within SW_INIT_1 (second bank of > > resets). > > Good to know that 9 is not the proper reset line, thank you. > > Unfortunately, I'm unable to make it work with the proper reset line (32). > > > > > The file link you provided appears to be lacking support for the > > "swinit" reset line, is that intentional? I don't think you can assume > > No idea why downstream RPi kernel does not use swinit reset. I found out accidentally that one does not need this (swinit) to properly function. > > > this will work without. > > If I do not populate swinit in PCIe DT node it works i.e. PCI > enumeration is working and RP1 south-bridge is functional. > > ~Stan
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