On Tue, Aug 06, 2024 at 10:27:46AM +0800, 412574090@xxxxxxx wrote: > From: weiyufeng <weiyufeng@xxxxxxxxxx> > > PCIe r6.0, sec 7.7.7.1, defines a new 64.0 GT/s PCIe Extended Capability > ID,Add the define for PCI_EXT_CAP_ID_PL_64GT for drivers that will want > this whilst doing Gen6 accesses. > > Signed-off-by: weiyufeng <weiyufeng@xxxxxxxxxx> > --- > include/uapi/linux/pci_regs.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index 94c00996e633..cc875534dae1 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -741,6 +741,7 @@ > #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */ > #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */ > #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ > +#define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */ It probably makes sense to add this (with the corrections noted by Ilpo), but I *would* like to see where it's used. I asked a similar question at https://lore.kernel.org/all/20230531095713.293229-1-ben.dooks@xxxxxxxxxxxxxxx/ when we added PCI_EXT_CAP_ID_PL_32GT, but never got a specific response. I don't really want to end up with drivers doing their own thing if it's something that could be done in the PCI core and shared. > #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */ > #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE > > -- > 2.25.1 >
