On Wed, Jul 31, 2024 at 04:20:14PM +0530, Manivannan Sadhasivam wrote: > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt > to the host CPU. This interrupt can be used by the device driver to > identify events such as PCIe link specific events, safety events, etc... > > Hence, document it in the binding along with the existing MSI interrupts. > Though adding a new interrupt will break the ABI, it is required to > accurately describe the hardware. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) Patch 10 should be combined with this. It's one logical change. Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
