From: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx> This patch set adds PCIe Root Port support for the Agilex family of FPGA chips. Patches 1 and 2 have been reviewed previously and individually on the mailing list and are included here with their revision history and Reviewed-by: tags for convenience and completeness. Patch 1: Convert text device tree binding for Altera Root Port PCIe controller to YAML. Patch 2: Convert text device tree binding for Altera PCIe MSI controller to YAML. Patch 3: Add new compatible strings for the three variants of the Agilex PCIe controller IP. Patch 4: Add a label to the soc@0 device tree node to be used by patch 5. Patch 5: Add base dtsi for PCIe Root Port support of the Agilex family of chips. Patch 6: Add dts enabling PCIe Root Port support on an Agilex F-series Development Kit. Patch 7: Update Altera PCIe controller driver to support the Agilex family of chips. D M, Sharath Kumar (1): pci: controller: pcie-altera: Add support for Agilex Matthew Gerlach (6): dt-bindings: PCI: altera: Convert to YAML dt-bindings: PCI: altera: msi: Convert to YAML dt-bindings: PCI: altera: Add binding for Agilex arm64: dts: agilex: add soc0 label arm64: dts: agilex: add dtsi for PCIe Root Port arm64: dts: agilex: add dts enabling PCIe Root Port .../bindings/pci/altera-pcie-msi.txt | 27 -- .../devicetree/bindings/pci/altera-pcie.txt | 50 ---- .../bindings/pci/altr,msi-controller.yaml | 65 +++++ .../bindings/pci/altr,pcie-root-port.yaml | 123 +++++++++ MAINTAINERS | 4 +- arch/arm64/boot/dts/intel/Makefile | 1 + arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +- .../socfpga_agilex7f_socdk_pcie_root_port.dts | 16 ++ .../intel/socfpga_agilex_pcie_root_port.dtsi | 55 ++++ drivers/pci/controller/pcie-altera.c | 260 ++++++++++++++++-- 10 files changed, 507 insertions(+), 96 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie-msi.txt delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt create mode 100644 Documentation/devicetree/bindings/pci/altr,msi-controller.yaml create mode 100644 Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex7f_socdk_pcie_root_port.dts create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi -- 2.34.1
