On Tue, 25 Jun 2024 15:08:12 +0530
Shradha Todi <shradha.t@xxxxxxxxxxx> wrote:
> Add support to use the RASDES feature of DesignWare PCIe controller
> using debugfs entries.
>
> RASDES is a vendor specific extended PCIe capability which reads the
> current hardware internal state of PCIe device. Following primary
> features are provided to userspace via debugfs:
> - Debug registers
> - Error injection
> - Statistical counters
>
> Signed-off-by: Shradha Todi <shradha.t@xxxxxxxxxxx>
A few minor things inline.
> +
> +struct rasdes_info {
> + /* to store rasdes capability offset */
> + u32 ras_cap;
> + struct mutex dbg_mutex;
Add a comment on what data this mutex protects.
> + struct dentry *rasdes;
> +};
> +struct err_inj {
Very generic name is likely to bite in future if similar
gets defined in a header. I'd at least prefix with dw_
> + const char *name;
> + /* values can be from group 0 - 6 */
> + u32 err_inj_group;
> + /* within each group there can be types */
> + u32 err_inj_type;
> + /* More details about the error */
> + u32 err_inj_12_31;
> +};
> +
> +int dwc_pcie_rasdes_debugfs_init(struct dw_pcie *pci)
> +{
> + struct device *dev = pci->dev;
> + int ras_cap;
> + struct rasdes_info *dump_info;
> + char dirname[DWC_DEBUGFS_MAX];
> + struct dentry *dir, *rasdes_debug, *rasdes_err_inj;
> + struct dentry *rasdes_event_counter, *rasdes_events;
> + int i;
Perhaps combine with int ras_cap above.
