On Thu, Jun 27, 2024 at 07:54:05AM +0800, kernel test robot wrote: > tree: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git controller/rockchip > head: 246afbe0f6fca433d8d918b740719170b1b082cc > commit: 246afbe0f6fca433d8d918b740719170b1b082cc [11/11] PCI: dw-rockchip: Use pci_epc_init_notify() directly > config: loongarch-randconfig-r081-20240626 (https://download.01.org/0day-ci/archive/20240627/202406270721.a8SQi2hn-lkp@xxxxxxxxx/config) > compiler: loongarch64-linux-gcc (GCC) 13.2.0 > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240627/202406270721.a8SQi2hn-lkp@xxxxxxxxx/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot <lkp@xxxxxxxxx> > | Closes: https://lore.kernel.org/oe-kbuild-all/202406270721.a8SQi2hn-lkp@xxxxxxxxx/ > > All errors (new ones prefixed by >>): > > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.o: in function `dw_pcie_ep_init_notify': > drivers/pci/controller/dwc/pcie-designware-ep.c:26:(.text+0x1e4): undefined reference to `pci_epc_init_notify' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.o: in function `dw_pcie_ep_deinit': > drivers/pci/controller/dwc/pcie-designware-ep.c:640:(.text+0x83c): undefined reference to `pci_epc_mem_free_addr' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.c:643:(.text+0x854): undefined reference to `pci_epc_mem_exit' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.o: in function `dw_pcie_ep_linkup': > drivers/pci/controller/dwc/pcie-designware-ep.c:811:(.text+0x924): undefined reference to `pci_epc_linkup' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.o: in function `dw_pcie_ep_linkdown': > drivers/pci/controller/dwc/pcie-designware-ep.c:836:(.text+0x964): undefined reference to `pci_epc_linkdown' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.o: in function `dw_pcie_ep_init': > drivers/pci/controller/dwc/pcie-designware-ep.c:875:(.text+0xe90): undefined reference to `__devm_pci_epc_create' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.c:888:(.text+0xf20): undefined reference to `pci_epc_mem_init' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.c:895:(.text+0xf54): undefined reference to `pci_epc_mem_alloc_addr' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-designware-ep.c:906:(.text+0xf74): undefined reference to `pci_epc_mem_exit' > loongarch64-linux-ld: drivers/pci/controller/dwc/pcie-dw-rockchip.o: in function `rockchip_pcie_configure_ep': > >> drivers/pci/controller/dwc/pcie-dw-rockchip.c:491:(.text+0x7cc): undefined reference to `pci_epc_init_notify' Hello Krzysztof, This is the same problem that the kernel test robot previously reported, and is fixed by: https://lore.kernel.org/linux-pci/20240626191325.4074794-2-cassel@xxxxxxxxxx/ Like I wrote in the other kernel test robot report, depending on .config, we could also see another build error if we don't have: 7a847796e509 ("PCI: endpoint: Introduce 'epc_deinit' event and notify the EPF drivers") (from the pci/endpoint branch). You have also previously cherry-picked: 3d2e425263e2 ("PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event") (from the pci/controller/dwc branch) which we also depend on. Perhaps the smartest thing right now is to just recreate the pci/controller/rockchip branch, by: 1) reset the rockchip branch to v6.10-rc1 2) merge the pci/controller/dwc branch to the rockchip branch 3) merge the pci/endpoint branch to to the rockchip branch 4) pick all the patches that are currently on the pci/controller/rockchip 5) squash: 246afbe0f6fc ("PCI: dw-rockchip: Use pci_epc_init_notify() directly") into the commit that adds dw-rockchip endpoint mode support (9b2ba393b3a6 ("PCI: dw-rockchip: Add endpoint mode support")) 6) squash: https://lore.kernel.org/linux-pci/20240626191325.4074794-2-cassel@xxxxxxxxxx/ into the commit that adds dw-rockchip endpoint mode support (9b2ba393b3a6 ("PCI: dw-rockchip: Add endpoint mode support")) This way: - All commits will build as individual patches, so no build errors from the test robot (even when it builds a patch that is in the middle (e.g. 10/11)). - Even if futher commits are applied to pci/controller/dwc or pci/endpoint, we will not depend on any newly applied patches to these branches, so there will be no need to "re-merge" the branches to the rockchip branch. Kind regards, Niklas
