On Fri, 21 Jun 2024 12:29:15 +0100, daire.mcnamara@xxxxxxxxxxxxx wrote: > From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > PolarFire SoC may be configured in a way that requires non-coherent DMA > handling. On RISC-V, buses are coherent by default & the dma-noncoherent > property is required to denote buses or devices that are non-coherent. > > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > Signed-off-by: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
