On Mon, Dec 11, 2023 at 04:52:54PM +0800, Jianjun Wang wrote:
> Use dmam_alloc_coherent() to allocate the MSI address, instead of using
> virt_to_phys().
>
What is the reason for this change? So now PCIE_MSI_VECTOR becomes unused?
- Mani
> Signed-off-by: Jianjun Wang <jianjun.wang@xxxxxxxxxxxx>
> ---
> drivers/pci/controller/pcie-mediatek.c | 24 ++++++++++++++++--------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
> index 66a8f73296fc..2fb9e44369f8 100644
> --- a/drivers/pci/controller/pcie-mediatek.c
> +++ b/drivers/pci/controller/pcie-mediatek.c
> @@ -178,6 +178,7 @@ struct mtk_pcie_soc {
> * @phy: pointer to PHY control block
> * @slot: port slot
> * @irq: GIC irq
> + * @msg_addr: MSI message address
> * @irq_domain: legacy INTx IRQ domain
> * @inner_domain: inner IRQ domain
> * @msi_domain: MSI IRQ domain
> @@ -198,6 +199,7 @@ struct mtk_pcie_port {
> struct phy *phy;
> u32 slot;
> int irq;
> + dma_addr_t msg_addr;
> struct irq_domain *irq_domain;
> struct irq_domain *inner_domain;
> struct irq_domain *msi_domain;
> @@ -394,12 +396,10 @@ static struct pci_ops mtk_pcie_ops_v2 = {
> static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
> {
> struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
> - phys_addr_t addr;
>
> /* MT2712/MT7622 only support 32-bit MSI addresses */
> - addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
> msg->address_hi = 0;
> - msg->address_lo = lower_32_bits(addr);
> + msg->address_lo = lower_32_bits(port->msg_addr);
>
> msg->data = data->hwirq;
>
> @@ -494,6 +494,14 @@ static struct msi_domain_info mtk_msi_domain_info = {
> static int mtk_pcie_allocate_msi_domains(struct mtk_pcie_port *port)
> {
> struct fwnode_handle *fwnode = of_node_to_fwnode(port->pcie->dev->of_node);
> + void *msi_vaddr;
> +
> + msi_vaddr = dmam_alloc_coherent(port->pcie->dev, sizeof(dma_addr_t), &port->msg_addr,
> + GFP_KERNEL);
> + if (!msi_vaddr) {
> + dev_err(port->pcie->dev, "failed to alloc and map MSI address\n");
> + return -ENOMEM;
> + }
>
> mutex_init(&port->lock);
>
> @@ -501,6 +509,7 @@ static int mtk_pcie_allocate_msi_domains(struct mtk_pcie_port *port)
> &msi_domain_ops, port);
> if (!port->inner_domain) {
> dev_err(port->pcie->dev, "failed to create IRQ domain\n");
> + dmam_free_coherent(port->pcie->dev, sizeof(dma_addr_t), msi_vaddr, port->msg_addr);
> return -ENOMEM;
> }
>
> @@ -508,6 +517,7 @@ static int mtk_pcie_allocate_msi_domains(struct mtk_pcie_port *port)
> port->inner_domain);
> if (!port->msi_domain) {
> dev_err(port->pcie->dev, "failed to create MSI domain\n");
> + dmam_free_coherent(port->pcie->dev, sizeof(dma_addr_t), msi_vaddr, port->msg_addr);
> irq_domain_remove(port->inner_domain);
> return -ENOMEM;
> }
> @@ -518,10 +528,8 @@ static int mtk_pcie_allocate_msi_domains(struct mtk_pcie_port *port)
> static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
> {
> u32 val;
> - phys_addr_t msg_addr;
>
> - msg_addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
> - val = lower_32_bits(msg_addr);
> + val = lower_32_bits(port->msg_addr);
> writel(val, port->base + PCIE_IMSI_ADDR);
>
> val = readl(port->base + PCIE_INT_MASK);
> @@ -588,7 +596,7 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port,
> if (IS_ENABLED(CONFIG_PCI_MSI)) {
> ret = mtk_pcie_allocate_msi_domains(port);
> if (ret)
> - return ret;
> + dev_warn(dev, "no MSI supported, only INTx available\n");
> }
>
> return 0;
> @@ -732,7 +740,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
> val &= ~INTX_MASK;
> writel(val, port->base + PCIE_INT_MASK);
>
> - if (IS_ENABLED(CONFIG_PCI_MSI))
> + if (IS_ENABLED(CONFIG_PCI_MSI) && port->msi_domain)
> mtk_pcie_enable_msi(port);
>
> /* Set AHB to PCIe translation windows */
> --
> 2.18.0
>
>
--
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