On Mon, 11 Mar 2024 19:41:34 +0530, Mrinmay Sarkar wrote:
> Due to some hardware changes, SA8775P has set the NO_SNOOP attribute
> in its TLP for all the PCIe controllers. NO_SNOOP attribute when set,
> the requester is indicating that no cache coherency issues exist for
> the addressed memory on the host i.e., memory is not cached. But in
> reality, requester cannot assume this unless there is a complete
> control/visibility over the addressed memory on the host.
>
> [...]
Applied, thanks!
[3/3] arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent
commit: 4b220c6fa9f379cb8803dbca73ae1f4128dfa5c8
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
