On Wed, May 08, 2024 at 11:27:31AM +0200, Niklas Cassel wrote:
> On Wed, May 08, 2024 at 10:22:07AM +0100, Jon Hunter wrote:
> > Tegra194 and Tegra234 PCIe EP controllers have 64K alignment
> > restriction for the inbound ATU. Set the endpoint inbound ATU alignment to
> > 64kB in the Tegra194 PCIe driver.
> >
> > Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
> > Suggested-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> > Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx>
Applied by Krzysztof to pci/controller/tegra194, but his outgoing mail
queue was stuck. Trying to squeeze into v6.10.
> > ---
> > Changes since V1: Updated commit message.
> >
> > drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> > index 93f5433c5c55..4537313ef37a 100644
> > --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> > @@ -2015,6 +2015,7 @@ static const struct pci_epc_features tegra_pcie_epc_features = {
> > .bar[BAR_3] = { .type = BAR_RESERVED, },
> > .bar[BAR_4] = { .type = BAR_RESERVED, },
> > .bar[BAR_5] = { .type = BAR_RESERVED, },
> > + .align = SZ_64K,
> > };
> >
> > static const struct pci_epc_features*
> > --
> > 2.34.1
> >
>
> Reviewed-by: Niklas Cassel <cassel@xxxxxxxxxx>
