On Tue, Apr 30, 2024 at 02:01:06PM +0200, Niklas Cassel wrote:
> This refactors the driver to prepare for EP mode.
> Add of-match data to the existing compatible, and explicitly define it as
> DW_PCIE_RC_TYPE. This way, we will be able to add EP mode in a follow-up
> patch in a much less intrusive way, which makes the follup-up patches
> much easier to review.
>
Same comment as previous patch.
> No functional change intended.
>
> Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 72 +++++++++++++++++++++------
> 1 file changed, 57 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 4023fd86176f..f985539fb00a 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -58,6 +58,11 @@ struct rockchip_pcie {
> struct gpio_desc *rst_gpio;
> struct regulator *vpcie3v3;
> struct irq_domain *irq_domain;
> + enum dw_pcie_device_mode mode;
> +};
> +
> +struct rockchip_pcie_of_data {
> + enum dw_pcie_device_mode mode;
> };
>
> static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg)
> @@ -195,7 +200,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> struct device *dev = rockchip->pci.dev;
> - u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE);
> int irq, ret;
>
> irq = of_irq_get_byname(dev->of_node, "legacy");
> @@ -209,12 +213,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
> irq_set_chained_handler_and_data(irq, rockchip_pcie_intx_handler,
> rockchip);
>
> - /* LTSSM enable control mode */
> - rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> -
> - rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,
> - PCIE_CLIENT_GENERAL_CONTROL);
> -
> return 0;
> }
>
> @@ -288,13 +286,41 @@ static const struct dw_pcie_ops dw_pcie_ops = {
> .start_link = rockchip_pcie_start_link,
> };
>
> +static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip)
> +{
> + struct dw_pcie_rp *pp;
> + u32 val;
> +
> + if (!IS_ENABLED(CONFIG_PCIE_ROCKCHIP_DW_HOST))
> + return -ENODEV;
Right now this driver is only selected using CONFIG_PCIE_ROCKCHIP_DW_HOST. So
this check is not valid in _this_patch.
- Mani
--
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