On Sat, Apr 13, 2024 at 12:02:12AM +0200, Niklas Cassel wrote:
> On Fri, Apr 12, 2024 at 01:59:01PM -0500, Bjorn Helgaas wrote:
> > On Wed, Mar 13, 2024 at 11:58:00AM +0100, Niklas Cassel wrote:
> > > ...
> >
> > > --- a/drivers/pci/controller/pcie-rockchip-ep.c
> > > +++ b/drivers/pci/controller/pcie-rockchip-ep.c
> > > @@ -153,7 +153,7 @@ static int rockchip_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn,
> > > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_IO_32BITS;
> > > } else {
> > > bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH);
> > > - bool is_64bits = sz > SZ_2G;
> > > + bool is_64bits = !!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64);
> > >
> > > if (is_64bits && (bar & 1))
> > > return -EINVAL;
> >
> > Completely unrelated to *these* patches, but the BAR_CFG_CTRL
> > definitions in both cadence and rockchip lead to some awkward case
> > analysis:
> >
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_32BITS 0x4
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_32BITS 0x5
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_64BITS 0x6
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_64BITS 0x7
> >
> > if (is_64bits && is_prefetch)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_64BITS;
> > else if (is_prefetch)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_32BITS;
> > else if (is_64bits)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_64BITS;
> > else
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_32BITS;
> >
> > that *could* be just something like this:
> >
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM 0x4
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_64BITS 0x2
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH 0x1
> >
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM;
> > if (is_64bits)
> > ctrl |= ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_64BITS;
> > if (is_prefetch)
> > ctrl |= ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH;
>
> If you send the cleanup patches, I will send the Reviewed-by tags ;)
Fair enough :)
