Re: [PATCH v5 0/6] PCI, x86: update MMCFG information when hot-plugging PCI host bridges

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Hi Taku,
	Thanks for testing. Could you please help to try the patch below?
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index a8da5d4..2551586 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -708,6 +708,13 @@ int __devinit pci_mmconfig_insert(int segment, int start, int end
        if (cfg) {
                if (cfg->start_bus <= start && cfg->end_bus >= end) {
                        rc = -EEXIST;
+               } else if (!addr) {
+                       /*
+                        * With some legacy BIOSes, the MCFG table only
+                        * partially covers bus ranges returned by
+                        * root bridges' _CRS method.
+                        */
+                       rc = -EEXIST;
                } else {
                        printk(KERN_WARNING PREFIX
                               "MMCONFIG for domain %04x [bus %02x-%02x] "

On 05/08/2012 04:21 PM, Taku Izumi wrote:
> 
> Hi Jiang,
> 
>  I tested this pachset.
>   (to be honest, as I used Bjorn tree, I changed a little of Patch6/6 
>    to apply to his tree.)
> 
>  My machine failed to boot after applied your patchset.
>  The reason is:
>     My machine's MCFG table shows that End bus number is 0x13.
> 
> [000h 0000  4]                    Signature : "MCFG"    /* Memory Mapped Configuration table */
> [004h 0004  4]                 Table Length : 00000040
> [008h 0008  1]                     Revision : 01
> [009h 0009  1]                     Checksum : 3E
> [00Ah 0010  6]                       Oem ID : "PTLTD "
> [010h 0016  8]                 Oem Table ID : "  MCFG  "
> [018h 0024  4]                 Oem Revision : 06040001
> [01Ch 0028  4]              Asl Compiler ID : " LTP"
> [020h 0032  4]        Asl Compiler Revision : 00000000
> 
> [024h 0036  8]                     Reserved : 0000000000000000
> 
> [02Ch 0044  8]                 Base Address : 00000000F0000000
> [034h 0052  2]         Segment Group Number : 0000
> [036h 0054  1]             Start Bus Number : 00
> [037h 0055  1]               End Bus Number : 13
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> [038h 0056  4]                     Reserved : 00000000
> 
>    But CRS shows bus range is 0x00 - 0xff. So arch_acpi_pci_root_add() failed
>    because pci_mmconfig_insert() returns not -EEXIST but -EINVAL.
> 
> [    0.094236] PCI: MMCONFIG for domain 0000 [bus 00-ff] conflicts with domain 0000 [bus 00-13]
> 
> int __devinit pci_mmconfig_insert(int segment, int start, int end, u64 addr)
> {
> ..
> (snip)
> ...
>         mutex_lock(&pci_mmcfg_lock);
>         cfg = pci_mmconfig_lookup(segment, start);
>         if (cfg) {
>                 if (cfg->start_bus <= start && cfg->end_bus >= end) {
>                         rc = -EEXIST;
>                 } else {
>                         printk(KERN_WARNING PREFIX
>                                "MMCONFIG for domain %04x [bus %02x-%02x] "
>                                "conflicts with domain %04x [bus %02x-%02x]\n",
>                                segment, start, end,
>                                cfg->segment, cfg->start_bus, cfg->end_bus);
>                 }
>                 goto out;
> 
> 
>   My impression is my machine's firmware is broken.
>   Howerver my machine boots well without your patchset. So I report as a problem.
> 
>    
> Best regards,
> Taku Izumi <izumi.taku@xxxxxxxxxxxxxx>
> 

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