On Tue, Feb 27, 2024 at 05:36:38PM -0600, Bjorn Helgaas wrote: > On Fri, Feb 23, 2024 at 08:18:04PM +0530, Krishna chaitanya chundru wrote: > > QCOM Resource Power Manager-hardened (RPMh) is a hardware block which > > maintains hardware state of a regulator by performing max aggregation of > > the requests made by all of the clients. > > It is manadate to scale the performance state based up on the PCIe speed > > link operates so that SoC can run under optimum power conditions. > > It sounds like it's more power efficient, but not actually > *mandatory*. Maybe something like this? > > The SoC can be more power efficient if we scale the performance > state based on the aggregate PCIe link speed. Actually, maybe it would be better to say "aggregate PCIe link bandwidth", because we use "speed" elsewhere (PCIE_SPEED2MBS_ENC(), etc) to refer specifically to the data rate independent of the width. > > Add Operating Performance Points(OPP) support to vote for RPMh state based > > upon the speed link is operating. > > "... based on the link speed." "... based on the aggregate link bandwidth." > > In PCIe certain speeds like GEN1x2 & GEN2x1 or GEN3x2 & GEN4x1 use > > same bw and frequency and thus the OPP entry, so use frequency based > > search to reduce number of entries in the OPP table. > > GEN1x2, GEN2x1, etc are not "speeds". I would say: > > Different link configurations may share the same aggregate speed, > e.g., a 2.5 GT/s x2 link and a 5.0 GT/s x1 link have the same speed > and share the same OPP entry. Different link configurations may share the same aggregate bandwidth, e.g., a 2.5 GT/s x2 link and a 5.0 GT/s x1 link have the same bandwidth and share the same OPP entry.
