On Wed, Feb 21, 2024 at 12:20:00PM -0600, Bjorn Helgaas wrote: > 1) D3hot doesn't work per spec. This sounds like a hardware > defect in the device that should be a quirk based on > Vendor/Device ID, not something in DT. I don't actually know if > this is common, although there are several existing quirks that > mention issues with D3. My recollection is that putting Root Ports into D3hot on older x86 systems would raise MCEs, which is why pci_bridge_d3_possible() only allows D3hot in cases which are known to work (e.g. Thunderbolt controllers, machines with a recent BIOS). It was a conservative policy chosen to avoid regressions. I don't know if similar issues exist on non-ACPI systems. If they don't exist, platform_pci_bridge_d3() could just return true for all devicetree-based systems. Might be worth testing if any systems can be found which exhibit issues with such a policy. That would obviate the need to specify "supports-d3" in the devicetree. Quite the opposite, ports which are known not to work could be blacklisted. Of course if it turns out that's the majority then whitelisting via "supports-d3" is a better option. > 2) The platform doesn't support putting the bridge in D3cold and > back to D0. I don't understand this either because I assumed DT > would describe *hardware*, and "supports-d3" might imply the > presence of hardware power control, but doesn't tell us how to > operate it, and it must be up to a native driver to know how to > do it. I think we're putting devices into D3hot first before cutting power (i.e. putting them into D3cold), so knowing that D3hot is safe is basically a prerequisite for D3cold. Thanks, Lukas
