On Fri, 16 Feb 2024 at 22:33, Bartosz Golaszewski <brgl@xxxxxxxx> wrote:
>
> From: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
>
> Describe the ath12k WLAN on-board the WCN7850 module present on the
> board.
WCN7850 is the same combo WiFi + BT chip. Is there any reason for
describing its parts separately rather than using the same PMU
approach?
>
> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> [Bartosz:
> - move the pcieport0 node into the .dtsi
> - make regulator naming consistent with existing DT code
> - add commit message]
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 29 +++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 +++++++++
> 2 files changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> index b07cac2e5bc8..4623c358f634 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> @@ -845,6 +845,28 @@ &pcie0 {
> status = "okay";
> };
>
> +&pcieport0 {
> + wifi@0 {
> + compatible = "pci17cb,1107";
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wlan_en>;
> +
> + enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
> +
> + vdd-supply = <&vreg_s4i_0p85>;
> + vddio-supply = <&vreg_l15b_1p8>;
> + vddio1p2-supply = <&vreg_l3c_1p2>;
> + vddaon-supply = <&vreg_s2c_0p8>;
> + vdddig-supply = <&vreg_s3c_0p9>;
> + vddrfa1p2-supply = <&vreg_s1c_1p2>;
> + vddrfa1p8-supply = <&vreg_s6c_1p8>;
> +
> + clocks = <&rpmhcc RPMH_RF_CLK1>;
> + };
> +};
> +
> &pcie0_phy {
> vdda-phy-supply = <&vreg_l1i_0p88>;
> vdda-pll-supply = <&vreg_l3i_1p2>;
> @@ -1139,6 +1161,13 @@ wcd_default: wcd-reset-n-active-state {
> bias-disable;
> output-low;
> };
> +
> + wlan_en: wlan-en-state {
> + pins = "gpio16";
> + function = "gpio";
> + drive-strength = <8>;
> + bias-pull-down;
> + };
> };
>
> &uart14 {
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index d488b3b3265e..baf4932e460c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -2293,6 +2293,16 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> dma-coherent;
>
> status = "disabled";
> +
> + pcieport0: pcie@0 {
> + device_type = "pci";
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> +
> + bus-range = <0x01 0xff>;
> + };
> };
>
> pcie0_phy: phy@1c06000 {
> --
> 2.40.1
>
--
With best wishes
Dmitry
