Hi Shimoda-san,
On Wed, Feb 14, 2024 at 6:22 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> This controller with GICv3 ITS can handle MSI-X, but it needs
> to set vendor-specific registers by using the MSI address value.
> To get the address, add .post_init() for it.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
Thanks for your patch!
> --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> @@ -297,6 +304,25 @@ static int rcar_gen4_pcie_host_init(struct dw_pcie_rp *pp)
> return 0;
> }
>
> +static void rcar_gen4_pcie_host_post_init(struct dw_pcie_rp *pp)
> +{
> + struct dw_pcie *dw = to_dw_pcie_from_pp(pp);
> + struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
> + struct irq_data *data;
> + struct pci_dev *dev;
> + struct msi_msg msg;
> +
> + if (pp->has_msi_ctrl)
> + return;
> +
> + list_for_each_entry(dev, &pp->bridge->bus->devices, bus_list) {
> + data = irq_get_irq_data(dev->irq);
If CONFIG_PCIEPORTBUS is disabled, data is NULL, causing a crash below.
I haven't found where exactly the irq data is filled in, and don't know
where/how the dependency on CONFIG_PCIEPORTBUS should be expressed.
> + __pci_read_msi_msg(irq_data_get_msi_desc(data), &msg);
> + writel(msg.address_lo, rcar->base + AXIINTCADDR);
> + writel(AXIINTCCONT_VAL, rcar->base + AXIINTCCONT);
> + }
> +}
> +
> static void rcar_gen4_pcie_host_deinit(struct dw_pcie_rp *pp)
> {
> struct dw_pcie *dw = to_dw_pcie_from_pp(pp);
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
