On Fri, Feb 09, 2024 at 07:22:17PM -0800, Kuppuswamy Sathyanarayanan wrote: > On 2/9/24 3:52 PM, Jim Harris wrote: > > @@ -677,8 +677,8 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) > > if (rc) > > goto err_pcibios; > > > > - kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); > > iov->num_VFs = nr_virtfn; > > + kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); Since it's accessed unlocked now, I *think* this wants appropriate barriers to ensure the order is observed the same on all CPUs. Something like 'smp_store_release(&iov->num_VFs, nr_virtfn)' for writing it, and use 'smp_load_acquire()' on the read-side.
