On Fri, Jan 26, 2024 at 11:40:37AM +0300, Dan Carpenter wrote:
> The "msg_addr" variable is u64. However, the "aligned_offset" is an
> unsigned int. This means that when the code does:
>
> msg_addr &= ~aligned_offset;
>
> it will unintentionally zero out the high 32 bits. Use ALIGN_DOWN()
> to do the alignment instead.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> Reviewed-by: Niklas Cassel <cassel@xxxxxxxxxx>
> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> ---
> v5: Add the #include.
> v4: Add stable and r-b from Niklas
> v3: Use ALIGN_DOWN()
> v2: fix typo in commit message
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 5befed2dc02b..d6b66597101e 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -6,6 +6,7 @@
> * Author: Kishon Vijay Abraham I <kishon@xxxxxx>
> */
>
> +#include <linux/align.h>
> #include <linux/bitfield.h>
> #include <linux/of.h>
> #include <linux/platform_device.h>
> @@ -551,7 +552,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> }
>
> aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
> - msg_addr &= ~aligned_offset;
> + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
> ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
> epc->mem->window.page_size);
> if (ret)
> --
> 2.43.0
>
Ping on these two patches.
Patch 1/2 is a strict fix and should go in v6.8 IMO.
Kind regards,
Niklas
