On Mon, Jan 22, 2024 at 06:19:52PM +0300, Dan Carpenter wrote:
> The "msg_addr" variable is u64. However, the "aligned_offset" is an
> unsigned int. This means that when the code does:
>
> msg_addr &= ~aligned_offset;
>
> it will unintentionally zero out the high 32 bits. Use ALIGN_DOWN()
> to do the alignment instead.
>
> Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> ---
> v2: fix typo in commit message
> v3: Use ALIGN_DOWN() instead of ANDing with ~aligned_offset (this is a
> style improvement).
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 5befed2dc02b..51679c6702cf 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -551,7 +551,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> }
>
> aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
> - msg_addr &= ~aligned_offset;
> + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
> ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
> epc->mem->window.page_size);
> if (ret)
> --
> 2.43.0
>
Oh.. I just got emails that the patch that this fixes has been backported,
so perhaps we should add:
Cc: stable@xxxxxxxxxxxxxxx
as well...?
Kind regards,
Niklas
