Hello Dan,
On Wed, Jan 17, 2024 at 09:32:08PM +0300, Dan Carpenter wrote:
> The "msg_addr" variable is u64. However, the "tbl_offset" is an unsigned
Here you write tbl_offset.
> int. This means that when the code does
>
> msg_addr &= ~aligned_offset;
>
> it will unintentionally zero out the high 32 bits. Declare "tbl_offset"
Here you also write tbl_offset.
> as a u64 to address this bug.
>
> Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> ---
> From static analysis (not tested).
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 5befed2dc02b..2b6607c23541 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -525,7 +525,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> struct dw_pcie_ep_func *ep_func;
> struct pci_epc *epc = ep->epc;
> u32 reg, msg_data, vec_ctrl;
> - unsigned int aligned_offset;
> + u64 aligned_offset;
Yet here you change actually change aligned_offset.
Since msg_addr is u64, aligned_offset should also be u64.
Sorry that I missed this.
I followed the pattern of dw_pcie_ep_raise_msi_irq().
I've tested my original patch, but the MSI address must have been in the
lower 32-bits.
Thank you for the fix!
If you modify dw_pcie_ep_raise_msix_irq(), perhaps we
should also modify dw_pcie_ep_raise_msi_irq(),
as it also has aligned_offset defined as "unsigned int"
and msg_addr as "u64".
Looking more carefully at dw_pcie_ep_raise_msi_irq(), it has:
u64 msg_addr;
u32 msg_addr_lower, msg_addr_upper;
and does:
msg_addr = ((u64)msg_addr_upper) << 32 |
(msg_addr_lower & ~aligned_offset);
So there is no problem there as that operation is performed only on
msg_addr_lower, which is u32.
However, perhaps we should also modify dw_pcie_ep_raise_msi_irq(),
so that "aligned_offset" is u64 instead of "unsigned int",
so that it also matches the msi_data.
That way dw_pcie_ep_raise_msi_irq() could instead look like this:
msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
msg_addr &= ~aligned_offset;
which is slightly more readable IMO, and will ensure that
dw_pcie_ep_raise_msi_irq() and dw_pcie_ep_raise_msix_irq()
are more similar. But I will leave that decision up to you.
Kind regards,
Niklas
