Hello, This series fixes the bindings for: Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml by updating the checks added for validating and enforcing the "num-lanes" property for different compatibles. In the commits which introduced and extended the checks for the "num-lanes" property, the property was not truly validated but only described. Therefore, the bindings are being updated to actually validate the "num-lanes" property. While at it, checks for "max-link-speed" are also being introduced. The intent of the aforementioned changes is to update the bindings for a new SoC namely TI's J722S SoC which has a similar PCIe controller to TI's AM64 SoC, but differs from it in terms of its support for Gen3 link speeds. For this reason, a new compatible is being added instead of reusing the one available for AM64 SoC. Series is based on linux-next tagged next-20240117. Regards, Siddharth. Siddharth Vadapalli (3): dt-bindings: PCI: ti,j721e-pci-*: Fix check for num-lanes dt-bindings: PCI: ti,j721e-pci-*: Add checks for max-link-speed dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S .../bindings/pci/ti,j721e-pci-ep.yaml | 34 +++++++++++--- .../bindings/pci/ti,j721e-pci-host.yaml | 47 ++++++++++++++++--- 2 files changed, 67 insertions(+), 14 deletions(-) -- 2.34.1
