On Fri, Sep 29, 2023 at 02:57:14PM +0300, Ilpo Järvinen wrote:
> PCIe Bandwidth Controller performs RMW accesses the Link Control 2
^
to
> Register which can occur concurrently to other sources of Link Control
> 2 Register writes. Therefore, add Link Control 2 Register among the PCI
> Express Capability Registers that need RMW locking.
[...]
> --- a/Documentation/PCI/pciebus-howto.rst
> +++ b/Documentation/PCI/pciebus-howto.rst
> @@ -218,7 +218,7 @@ that is shared between many drivers including the service drivers.
> RMW Capability accessors (pcie_capability_clear_and_set_word(),
> pcie_capability_set_word(), and pcie_capability_clear_word()) protect
> a selected set of PCI Express Capability Registers (Link Control
> -Register and Root Control Register). Any change to those registers
> -should be performed using RMW accessors to avoid problems due to
> -concurrent updates. For the up-to-date list of protected registers,
> -see pcie_capability_clear_and_set_word().
> +Register, Root Control Register, and Link Control 2 Register). Any
> +change to those registers should be performed using RMW accessors to
> +avoid problems due to concurrent updates. For the up-to-date list of
> +protected registers, see pcie_capability_clear_and_set_word().
Maybe use a list of bullet points of the affected registers so that
this can be extended more easily in the future.
Otherwise,
Reviewed-by: Lukas Wunner <lukas@xxxxxxxxx>
