Re: [PATCH v7 0/3] PCI: brcmstb: Configure appropriate HW CLKREQ# mode

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On 11/9/23 11:13, Jim Quinlan wrote:
v7 -- Manivannan Sadhasivam suggested (a) making the property look like a
       network phy-mode and (b) keeping the code simple (not counting clkreq
       signal appearances, un-advertising capabilites, etc).  This is
       what I have done.  The property is now "brcm,clkreq-mode" and
       the values may be one of "safe", "default", and "no-l1ss".  The
       default setting is to employ the most capable power savings mode.

v6 -- No code has been changed.
    -- Changed commit subject and comment in "#PERST" commit (Bjorn, Cyril)
    -- Changed sign-off and author email address for all commits.
       This was due to a change in Broadcom's upstreaming policy.

v5 -- Remove DT property "brcm,completion-timeout-us" from	
       "DT bindings" commit.  Although this error may be reported	
       as a completion timeout, its cause was traced to an	
       internal bus timeout which may occur even when there is	
       no PCIe access being processed.  We set a timeout of four	
       seconds only if we are operating in "L1SS CLKREQ#" mode.
    -- Correct CEM 2.0 reference provided by HW engineer,
       s/3.2.5.2.5/3.2.5.2.2/ (Bjorn)
    -- Add newline to dev_info() string (Stefan)
    -- Change variable rval to unsigned (Stefan)
    -- s/implementaion/implementation/ (Bjorn)
    -- s/superpowersave/powersupersave/ (Bjorn)
    -- Slightly modify message on "PERST#" commit.
    -- Rebase to torvalds master

v4 -- New commit that asserts PERST# for 2711/RPi SOCs at PCIe RC
       driver probe() time.  This is done in Raspian Linux and its
       absence may be the cause of a failing test case.
    -- New commit that removes stale comment.

v3 -- Rewrote commit msgs and comments refering panics if L1SS
       is enabled/disabled; the code snippet that unadvertises L1SS
       eliminates the panic scenario. (Bjorn)
    -- Add reference for "400ns of CLKREQ# assertion" blurb (Bjorn)
    -- Put binding names in DT commit Subject (Bjorn)
    -- Add a verb to a commit's subject line (Bjorn)
    -- s/accomodat(\w+)/accommodat$1/g (Bjorn)
    -- Rewrote commit msgs and comments refering panics if L1SS
       is enabled/disabled; the code snippet that unadvertises L1SS
       eliminates the panic scenario. (Bjorn)

v2 -- Changed binding property 'brcm,completion-timeout-msec' to
       'brcm,completion-timeout-us'.  (StefanW for standard suffix).
    -- Warn when clamping timeout value, and include clamped
       region in message. Also add min and max in YAML. (StefanW)
    -- Qualify description of "brcm,completion-timeout-us" so that
       it refers to PCIe transactions. (StefanW)
    -- Remvove mention of Linux specifics in binding description. (StefanW)
    -- s/clkreq#/CLKREQ#/g (Bjorn)
    -- Refactor completion-timeout-us code to compare max and min to
       value given by the property (as opposed to the computed value).

v1 -- The current driver assumes the downstream devices can
       provide CLKREQ# for ASPM.  These commits accomodate devices
       w/ or w/o clkreq# and also handle L1SS-capable devices.

    -- The Raspian Linux folks have already been using a PCIe RC
       property "brcm,enable-l1ss".  These commits use the same
       property, in a backward-compatible manner, and the implementaion
       adds more detail and also automatically identifies devices w/o
       a clkreq# signal, i.e. most devices plugged into an RPi CM4
       IO board.

For the entire series:

Tested-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>

on all of my available devices:

- SUNIX Co., Ltd. Multiport serial controller
- Broadcom BCM4331 Wi-Fi
- Broadcom BCM43224 Wi-Fi
- Broadcom BCM4322 Wi-Fi
- Qualcomm Atheros AR5008
- Broadcom BCM4366 Wi-Fi
- Marvell Technology Group Ltd. 88SE9125 PCIe SATA 6.0 Gb/s controller
- Intel 7260 Wi-Fi
- Intel Corporation 82574L Gigabit Network Connection
- Broadcom NetXtreme BCM5751 Gigabit Ethernet
- Pepperl+Fuchs RocketPort EXPRESS 8-port w/Octa Cable
- Micron/Crucial Technology P2 NVMe PCIe SSD
- ASM1184e PCIe Switch Port
--
Florian

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