On Sat, Nov 04, 2023 at 09:32:14PM +0800, Shuai Xue wrote:
> The clear and set pattern is commonly used for accessing pci config,
> move the helper pci_clear_and_set_dword from aspm.c into pci header.
s/move/Move/ (in subject, capitalize first word)
s/pci/PCI/ (capitalize in English text)
s/pci_clear_and_set_dword/pci_clear_and_set_dword()/ (add parens to
function names, also in subject)
With the fixes here and below:
Acked-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Signed-off-by: Shuai Xue <xueshuai@xxxxxxxxxxxxxxxxx>
> ---
> drivers/pci/access.c | 12 ++++++++++++
> drivers/pci/pcie/aspm.c | 11 -----------
> include/linux/pci.h | 2 ++
> 3 files changed, 14 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/pci/access.c b/drivers/pci/access.c
> index 6554a2e89d36..526360481d99 100644
> --- a/drivers/pci/access.c
> +++ b/drivers/pci/access.c
> @@ -598,3 +598,15 @@ int pci_write_config_dword(const struct pci_dev *dev, int where,
> return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
> }
> EXPORT_SYMBOL(pci_write_config_dword);
> +
> +void pci_clear_and_set_dword(const struct pci_dev *dev, int pos,
> + u32 clear, u32 set)
Rename to pci_clear_and_set_config_dword() to retain the "config"
information and match the other accessors.
Align "u32 clear" under "const struct ...". pci_write_config_dword()
above is an anomaly.
> +{
> + u32 val;
> +
> + pci_read_config_dword(dev, pos, &val);
> + val &= ~clear;
> + val |= set;
> + pci_write_config_dword(dev, pos, val);
> +}
> +EXPORT_SYMBOL(pci_clear_and_set_dword);
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 1bf630059264..f4e64fedc048 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -423,17 +423,6 @@ static void pcie_aspm_check_latency(struct pci_dev *endpoint)
> }
> }
>
> -static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos,
> - u32 clear, u32 set)
> -{
> - u32 val;
> -
> - pci_read_config_dword(pdev, pos, &val);
> - val &= ~clear;
> - val |= set;
> - pci_write_config_dword(pdev, pos, val);
> -}
> -
> /* Calculate L1.2 PM substate timing parameters */
> static void aspm_calc_l12_info(struct pcie_link_state *link,
> u32 parent_l1ss_cap, u32 child_l1ss_cap)
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 8c7c2c3c6c65..271f30fd7ca4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1213,6 +1213,8 @@ int pci_read_config_dword(const struct pci_dev *dev, int where, u32 *val);
> int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val);
> int pci_write_config_word(const struct pci_dev *dev, int where, u16 val);
> int pci_write_config_dword(const struct pci_dev *dev, int where, u32 val);
> +void pci_clear_and_set_dword(const struct pci_dev *dev, int pos,
> + u32 clear, u32 set);
Align "u32 clear" again.
> int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
> int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
> --
> 2.39.3
>
>
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